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|Title:||Algorithms for finding best locations of cluster heads for minimizing energy consumption in wireless sensor networks with prohibited region||Authors:||Yin, Yihu||Keywords:||Engineering::Electrical and electronic engineering||Issue Date:||2022||Publisher:||Nanyang Technological University||Source:||Yin, Y. (2022). Algorithms for finding best locations of cluster heads for minimizing energy consumption in wireless sensor networks with prohibited region. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/159023||Abstract:||With the rapid development and maturity of communication technology, embed ded computing technology and sensor technology, sensor appears. Meanwhile, wireless sensor network is developing rapidly. The advantages of wireless sen sor network make it widely used in many fields, which greatly facilitates in dividuals’ life. All electronic devices need energy to support operation, and so do sensors. Therefore, energy consumption optimization in wireless sensor net works has become the focus of research. Energy consumption optimization can be realized by selecting different Cluster Head positions in previous researches. However, they didn’t consider the existence of prohibited regions, which cannot be ignored in practical application scenarios. This paper mainly focuses on how to select the position of Cluster Head in the two-dimensional plane to achieve the lowest energy consumption in the case of prohibited regions. On the basis of the global optimal location calculated by the existing algorithms, the offset from the optimal location was set to observe the change of energy consumption through offset distance, and the algorithm was designed to solve the position of the second optimal Cluster Head location successfully in different kind of pro hibited regions under single-cluster and multi-cluster circumstances. This paper presents an analytical solution for the circle and rectangle regions and a sampling solution for irregular region. Finally, simulation is designed to verify the correctness and superiority of the algorithm.||URI:||https://hdl.handle.net/10356/159023||Schools:||School of Electrical and Electronic Engineering||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
Updated on Dec 8, 2023
Updated on Dec 8, 2023
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