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https://hdl.handle.net/10356/161608
Title: | Hardware design and optimization of a three-level three-phase solar inverter | Authors: | Wang, Zixuan | Keywords: | Engineering::Electrical and electronic engineering::Electric power::Auxiliaries, applications and electric industries | Issue Date: | 2022 | Publisher: | Nanyang Technological University | Source: | Wang, Z. (2022). Hardware design and optimization of a three-level three-phase solar inverter. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/161608 | Abstract: | The NPC three-level inverter can switch the output voltage by controlling the switching signal of the bridge arm with SPWM technology, and the output voltage is a square wave of different widths. After the sine wave is obtained, a reference voltage of the same sine wave is set and the error is fed into the controller to generate a new modulating wave, thus changing the output voltage. The controller consists of a quasi-resonant controller and a current proportional negative feedback controller. The quasi-resonant controller can achieve a very good sinusoidal voltage following effect, which greatly simplifies the control circuit and improves the output voltage quality and control accuracy. However, there is a modulator delay effect in the actual circuit, which needs to be simulated in the simulation. Removing the current feedback and increasing the output voltage proportional positive feedback will give accurate and stable output results in system with modulator delay effect. | URI: | https://hdl.handle.net/10356/161608 | Schools: | School of Electrical and Electronic Engineering | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Theses |
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Wangzixuan.pdf Restricted Access | 4.5 MB | Adobe PDF | View/Open |
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