Educational simulator for analyzing pipelined LEGv8 architecture

Abstract

For computer science and computer engineering students, the study of computer architecture is an essential topic as knowing how computers operate can help with developing better and more efficient software. However, many students struggle with this subject as the concepts are largely abstract and complex. Thus, there is a need for graphical, intuitive, and flexible teaching aids to supplement students’ learning. There are numerous simulators available for architectures like the MIPS architecture, but none are specifically designed for the LEGv8 architecture. Therefore, this project aims to build a user-friendly and interactive educational simulator for analysing the pipelined LEGv8 architecture. The simulator is developed as a web application that can support the assembly of LEGv8 instructions, execution of the instructions and also the visualisation of the datapath diagrams during execution. Users will be able to analyse the changes in the registers and memory as well as the data flow during single cycle or pipelined execution with the option to select which control and data hazard handling method to use.