Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/163580
Title: Chip scale atomic clock for satellite timing and navigation application
Authors: Pham, Quang Huy
Keywords: Engineering::Mechanical engineering
Issue Date: 2023
Publisher: Nanyang Technological University
Source: Pham, Q. H. (2023). Chip scale atomic clock for satellite timing and navigation application. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/163580
Project: B470 
Abstract: Currently, with the advancement of technology, especially satellites and robots, it is easier to collect data about outer space. Having a precise and reliable time reference as the Earth is one of the most essential things in space exploration since it affects the accuracy of spacecraft positioning and data mapping. The Chip Scale Atomic Clock (CSAC) is an atomic clock using caesium with excellent short-term stability as illustrated from the Allan deviation analysis. In space application, that amount of uncertainty in time can transfer to an error of 0.09 meters in distance and can be larger. However, being small, light, and precise, CSAC is a potential candidate for small satellites application. Hence, it is essential to develop a simulator for understanding and estimating the clock performance of the CSAC during a satellite mission. In this project, the three-state model with additional aging and temperature effect was described and applied in numerical simulations of the clock performance of CSAC. In addition, the experiment was developed and set up to verify the errors of CSAC in one-way ranging measurements. This project has designed and developed a fundamental experiment setup for one-way ranging measurement and succeeded in obtaining simulation results within the acceptable ranges from the reported data.
URI: https://hdl.handle.net/10356/163580
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:MAE Student Reports (FYP/IA/PA/PI)

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