Please use this identifier to cite or link to this item:
Title: Design of a CMOS relaxation oscillator with reduced circuit sensitivity
Authors: Liao, Yizhuo
Keywords: Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2022
Publisher: Nanyang Technological University
Source: Liao, Y. (2022). Design of a CMOS relaxation oscillator with reduced circuit sensitivity. Master's thesis, Nanyang Technological University, Singapore.
Project: ISM-DISS-02914
Abstract: A fully-integrated CMOS relaxation oscillator which is realized in 40nm CMOS technology is presented. The oscillator includes a stable 2-Transistor based voltage reference without operational amplifier, a simple current reference employing the temperature-compensated composite resistor and the approximated Complementary-to-Absolute-Temperature (CTAT) delay based comparators compensate the approximated Proportional-to-Absolute-Temperature (PTAT) delay arising from the leakage currents in switches. This relaxation oscillator is designed to output a square wave with frequency of 64kHz in duty cycle of 50% at 1.1V supply. The simulation results have demonstrated that the circuit can generate a square wave with stable frequency against temperature and supply variation whilst consuming low current consumption. For temperature range from -20°C to 80°C at 1.1V supply, the oscillator’ output frequency has achieved temperature coefficient (T.C.) of 12.4 ppm/°C in typical corner in one sample simulation. For 200-sample Monte Carlo simulation, the obtained T.C. is 25 ppm/°C. Under typical corner and room temperature, the simulated line sensitivity is 0.045%/V over the supply from 1.1V to 1.6V and the dynamic current consumption is 552nA. A better figure-of-merit (FOM), which equals to 0.129%, is displayed when compared to the representative prior-art works.
Schools: School of Electrical and Electronic Engineering 
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
Design of a CMOS Relaxation Oscillator with Reduced Circuit Sensitivity.pdf
  Restricted Access
1.94 MBAdobe PDFView/Open

Page view(s)

Updated on Jun 18, 2024


Updated on Jun 18, 2024

Google ScholarTM


Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.