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https://hdl.handle.net/10356/165882| Title: | A Web/Java simulator for RISC processor | Authors: | Ang, Rachel Sue Cheng | Keywords: | Engineering::Computer science and engineering | Issue Date: | 2023 | Publisher: | Nanyang Technological University | Source: | Ang, R. S. C. (2023). A Web/Java simulator for RISC processor. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/165882 | Project: | PSCSE21-0056 | Abstract: | In recent years, the Internet of Things (IoT) technology has become a rising trend worldwide and integration of IoT with businesses and industries has been highly propelled. Innovation for such technology is highly pursued, thus increasing the cost for research, design, and production. Significant portion of this cost is from the costly licensing fee of the Instruction Set Architecture (ISA). Most ISAs are also propriety due to business reasons. | URI: | https://hdl.handle.net/10356/165882 | Schools: | School of Computer Science and Engineering | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
| Appears in Collections: | SCSE Student Reports (FYP/IA/PA/PI) |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Rachel Ang_Final Year Report.pdf Restricted Access | 1.49 MB | Adobe PDF | View/Open |
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