Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/166578
Title: Mitigation of corner polysilicon residues through nitride liner etch relocation
Authors: Zheng, Zhe
Keywords: Engineering::Electrical and electronic engineering
Issue Date: 2023
Publisher: Nanyang Technological University
Source: Zheng, Z. (2023). Mitigation of corner polysilicon residues through nitride liner etch relocation. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/166578
Abstract: NAND flash memory has grown enormously and becomes the most popular non-volatile SSD (Solid State Drives). After 2D NAND reaches its limit, the 3D structure has become the mainstream of NAND. 3D NAND increases capacity in a given footprint without an excessive shrinking of the flash memory chips to fit more on the limited die size. In 3D NAND, a vertical polysilicon channel connects the source line and bit line. In the previous technologies, the contact between the pillar and the source polysilicon was performed by dry etching by punching a hole in the pillar bottom. However, as the number of 3D NAND layers increases, dry etching becomes increasingly difficult to perform precise vertical etching without damaging critical cell films deposited on the pillar sidewall. To overcome this limitation of the dry etch, a new Lateral Contact flow was developed in 3D NAND where pillar to source connection is made from source side through sideway etch rather than vertical etch, hence the name 'Lateral Contact'. In the lateral contact process, polysilicon is deposited and recessed through a slit to make contact between source and pillar. However, there are unique challenges observed in poly recess via slit region. The structure of the slit has corners, and the polysilicon recess etchant cannot etch the corner polysilicon before reaching the polysilicon seam. Those corner polysilicon residues lift off after the replacement gate process and are attached to the tiers to cause word line short issues. The proposed flow introduces a new integration flow which fundamentally removes the root cause of polysilicon lift-off problem. This thesis verifies the proposed flow through the blanket wafer test, topography wafer test, and production wafer test. The blanket wafer test finds the chemistry which has high nitride etch rate and low oxide, polysilicon etch rate. The result of topography wafer test shows that the proposal flow can successfully solve the polysilicon stringers issue without causing any other issue. The efficacy of proposed flow was also tested in the production wafer and the test result shows that the new flow significantly improves the yield loss by eliminating the poly stringers.
URI: https://hdl.handle.net/10356/166578
Schools: School of Electrical and Electronic Engineering 
Organisations: Technical University of Munich
Fulltext Permission: embargo_restricted_20250301
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
Master's Dissertation_Zheng Zhe_final.pdf
  Until 2025-03-01
3.16 MBAdobe PDFUnder embargo until Mar 01, 2025

Page view(s)

160
Updated on Apr 19, 2024

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.