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Title: | A fast wake-up circuit for internet-of-things regulator | Authors: | Yee, Hern Yue | Keywords: | Engineering::Electrical and electronic engineering | Issue Date: | 2023 | Publisher: | Nanyang Technological University | Source: | Yee, H. Y. (2023). A fast wake-up circuit for internet-of-things regulator. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/167139 | Project: | A2096-221 | Abstract: | The LDO (Low Dropout) regulator is a fundamental component used in regulating a stable output voltage for electronic systems, such as portable and battery-powered devices. For IoT (Internet of Things) regulators, power consumption is a crucial concern, and they are mostly kept in sleep mode and turned on only when required. However, for applications like portable devices, automotive electronics, sensors, and control systems, a fast wake-up time is essential for reliable operation. Unfortunately, the complex circuitry and large time constant nodes during start-up often hinder the power-on time of IoT regulators. Therefore, the motivation to design a fast wake-up LDO regulator for IoT applications has become a priority. This work proposes three circuit design techniques, namely the utilization of dynamically-biased transistors, non-linear biasing, and cascode configuration in OTA's second stage, to improve the wake-up time. The performance parameters of the LDO regulator will be simulated and verified using Cadence Tools with TSMC 40nm process design kit. The results of the simulation are presented and discussed in this project. The proposed design has achieved a promising power-on time of 37.57ns and 51.03ns at IL = 0mA and IL = 50mA , respectively, which is twice the power-up speed of the previous MSc fast power-on LDO regulator. Additionally, the proposed design exhibits a better transient response, higher maximum load current, and better overall FoM than the previously reported LDO regulator | URI: | https://hdl.handle.net/10356/167139 | Schools: | School of Electrical and Electronic Engineering | Research Centres: | IC Design Lab 1 | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Student Reports (FYP/IA/PA/PI) |
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File | Description | Size | Format | |
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Final Year Project Yee Hern Yue.pdf Restricted Access | 1.4 MB | Adobe PDF | View/Open |
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