Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/167489
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dc.contributor.authorKong, Haoen_US
dc.contributor.authorLiu, Dien_US
dc.contributor.authorLuo, Xiangzhongen_US
dc.contributor.authorHuai, Shuoen_US
dc.contributor.authorSubramaniam, Ravien_US
dc.contributor.authorMakaya, Christianen_US
dc.contributor.authorLin, Qianen_US
dc.contributor.authorLiu, Weichenen_US
dc.date.accessioned2023-09-18T07:40:44Z-
dc.date.available2023-09-18T07:40:44Z-
dc.date.issued2023-
dc.identifier.citationKong, H., Liu, D., Luo, X., Huai, S., Subramaniam, R., Makaya, C., Lin, Q. & Liu, W. (2023). Towards efficient convolutional neural network for embedded hardware via multi-dimensional pruning. 2023 60th ACM/IEEE Design Automation Conference (DAC). https://dx.doi.org/10.1109/DAC56929.2023.10247965en_US
dc.identifier.isbn979-8-3503-2348-1-
dc.identifier.urihttps://hdl.handle.net/10356/167489-
dc.description.abstractIn this paper, we propose TECO, a multi-dimensional pruning framework to collaboratively prune the three dimensions (depth, width, and resolution) of convolutional neural networks (CNNs) for better execution efficiency on embedded hardware. In TECO, we first introduce a two-stage importance evaluation framework, which efficiently and comprehensively evaluates each pruning unit according to both the local importance inside each dimension and the global importance across different dimensions. Based on the evaluation framework, we present a heuristic pruning algorithm to progressively prune the three dimensions of CNNs towards the optimal trade-off between accuracy and efficiency. Experiments on multiple benchmarks validate the advantages of TECO over existing state-of-the-art (SOTA) approaches. The code and pre-trained models are available anonymously at https://github.com/ntuliuteam/Teco.en_US
dc.description.sponsorshipMinistry of Education (MOE)en_US
dc.description.sponsorshipNanyang Technological Universityen_US
dc.description.sponsorshipNational Research Foundation (NRF)en_US
dc.language.isoenen_US
dc.relationI1801E0028en_US
dc.relationMOE2019-T2-1-071en_US
dc.relationNAP(M4082282)en_US
dc.relation.uri10.21979/N9/BTNOJNen_US
dc.rights© 2023 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/DAC56929.2023.10247965.en_US
dc.subjectEngineering::Computer science and engineeringen_US
dc.titleTowards efficient convolutional neural network for embedded hardware via multi-dimensional pruningen_US
dc.typeConference Paperen
dc.contributor.schoolSchool of Computer Science and Engineeringen_US
dc.contributor.conference2023 60th ACM/IEEE Design Automation Conference (DAC)en_US
dc.contributor.researchHP-NTU Digital Manufacturing Corporate Laben_US
dc.identifier.doi10.1109/DAC56929.2023.10247965-
dc.description.versionSubmitted/Accepted versionen_US
dc.subject.keywordsMeasurementen_US
dc.subject.keywordsDesign Automationen_US
dc.citation.conferencelocationSan Francisco, USAen_US
dc.description.acknowledgementThis study is partially supported under the RIE2020 Industry Alignment Fund – Industry Collaboration Projects (IAF-ICP) Funding Initiative, as well as cash and in-kind contribution from the industry partner, HP Inc., through the HP-NTU Digital Manufacturing Corporate Lab (I1801E0028). This work is also partially supported by the Ministry of Education, Singapore, under its Academic Research Fund Tier 2 (MOE2019-T2-1-071), and Nanyang Technological University, Singapore, under its NAP (M4082282).en_US
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