Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/167489
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kong, Hao | en_US |
dc.contributor.author | Liu, Di | en_US |
dc.contributor.author | Luo, Xiangzhong | en_US |
dc.contributor.author | Huai, Shuo | en_US |
dc.contributor.author | Subramaniam, Ravi | en_US |
dc.contributor.author | Makaya, Christian | en_US |
dc.contributor.author | Lin, Qian | en_US |
dc.contributor.author | Liu, Weichen | en_US |
dc.date.accessioned | 2023-09-18T07:40:44Z | - |
dc.date.available | 2023-09-18T07:40:44Z | - |
dc.date.issued | 2023 | - |
dc.identifier.citation | Kong, H., Liu, D., Luo, X., Huai, S., Subramaniam, R., Makaya, C., Lin, Q. & Liu, W. (2023). Towards efficient convolutional neural network for embedded hardware via multi-dimensional pruning. 2023 60th ACM/IEEE Design Automation Conference (DAC). https://dx.doi.org/10.1109/DAC56929.2023.10247965 | en_US |
dc.identifier.isbn | 979-8-3503-2348-1 | - |
dc.identifier.uri | https://hdl.handle.net/10356/167489 | - |
dc.description.abstract | In this paper, we propose TECO, a multi-dimensional pruning framework to collaboratively prune the three dimensions (depth, width, and resolution) of convolutional neural networks (CNNs) for better execution efficiency on embedded hardware. In TECO, we first introduce a two-stage importance evaluation framework, which efficiently and comprehensively evaluates each pruning unit according to both the local importance inside each dimension and the global importance across different dimensions. Based on the evaluation framework, we present a heuristic pruning algorithm to progressively prune the three dimensions of CNNs towards the optimal trade-off between accuracy and efficiency. Experiments on multiple benchmarks validate the advantages of TECO over existing state-of-the-art (SOTA) approaches. The code and pre-trained models are available anonymously at https://github.com/ntuliuteam/Teco. | en_US |
dc.description.sponsorship | Ministry of Education (MOE) | en_US |
dc.description.sponsorship | Nanyang Technological University | en_US |
dc.description.sponsorship | National Research Foundation (NRF) | en_US |
dc.language.iso | en | en_US |
dc.relation | I1801E0028 | en_US |
dc.relation | MOE2019-T2-1-071 | en_US |
dc.relation | NAP(M4082282) | en_US |
dc.relation.uri | 10.21979/N9/BTNOJN | en_US |
dc.rights | © 2023 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/DAC56929.2023.10247965. | en_US |
dc.subject | Engineering::Computer science and engineering | en_US |
dc.title | Towards efficient convolutional neural network for embedded hardware via multi-dimensional pruning | en_US |
dc.type | Conference Paper | en |
dc.contributor.school | School of Computer Science and Engineering | en_US |
dc.contributor.conference | 2023 60th ACM/IEEE Design Automation Conference (DAC) | en_US |
dc.contributor.research | HP-NTU Digital Manufacturing Corporate Lab | en_US |
dc.identifier.doi | 10.1109/DAC56929.2023.10247965 | - |
dc.description.version | Submitted/Accepted version | en_US |
dc.subject.keywords | Measurement | en_US |
dc.subject.keywords | Design Automation | en_US |
dc.citation.conferencelocation | San Francisco, USA | en_US |
dc.description.acknowledgement | This study is partially supported under the RIE2020 Industry Alignment Fund – Industry Collaboration Projects (IAF-ICP) Funding Initiative, as well as cash and in-kind contribution from the industry partner, HP Inc., through the HP-NTU Digital Manufacturing Corporate Lab (I1801E0028). This work is also partially supported by the Ministry of Education, Singapore, under its Academic Research Fund Tier 2 (MOE2019-T2-1-071), and Nanyang Technological University, Singapore, under its NAP (M4082282). | en_US |
item.grantfulltext | open | - |
item.fulltext | With Fulltext | - |
Appears in Collections: | SCSE Conference Papers |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
dac_9pt.pdf | Finally submitted version | 731.05 kB | Adobe PDF | View/Open |
SCOPUSTM
Citations
50
1
Updated on Aug 29, 2024
Page view(s)
149
Updated on Sep 5, 2024
Download(s) 50
84
Updated on Sep 5, 2024
Google ScholarTM
Check
Altmetric
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.