Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/16924
Title: Analog smart I/O pads
Authors: Tan, Shyue Mei.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2009
Abstract: Electrostatic discharge (ESD) is one of the leading causes of microchip failure during manufacture as well as field and consumer use [National Semiconductor Corporation]. ESD is an increasingly significant problem in integrated circuit design as increasing pin counts and faster circuit speeds compound the need for more and better reliable ESD protection. ESD refers to the phenomena whereby a high energy electrical discharge of current is produced at the input and/or output nodes of integrated circuit as a consequence of static charge build-up on an IC package. The buildup of static charge can be due to human body handling the IC or contribute by IC manufacturing handling equipment. Electrostatic discharge from a person has the potential to disable or destroy an entire integrated circuit. As a result, lot of effort putting on circuit design was thrown down the drain. Therefore, a well design on-chip protection circuit is crucial and essential in overcoming the ESD issue. Moreover, the analog buffer is designed for the purpose of driving the analog voltage as closely as possible with the input voltage. Likewise, the output sweep range will be increase by proposing the use of native NMOS and low threshold voltage NMOS. Not only that, the 3dB frequency bandwidth can be achieved up to 25MHz and the THD is below 0.5%. In this project, a complete on-chip ESD protection circuit has been constructed in a form of library cell. Besides that, the analog buffer is added with the ESD protection in the output pad. The effectiveness of the ESD protection pad and the accuracy of the analog buffer are investigated through post simulation and circuit simulation respectively. This technique has been successful in protecting the MOS devices used to fabricate analog, digital and mixed signal circuits.
URI: http://hdl.handle.net/10356/16924
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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