Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/171735
Title: On hardware-aware design and optimization of edge intelligence
Authors: Huai, Shuo
Kong, Hao
Luo, Xiangzhong
Liu, Di
Subramaniam, Ravi
Makaya, Christian
Lin, Qian
Liu, Weichen
Keywords: Engineering::Computer science and engineering
Issue Date: 2023
Source: Huai, S., Kong, H., Luo, X., Liu, D., Subramaniam, R., Makaya, C., Lin, Q. & Liu, W. (2023). On hardware-aware design and optimization of edge intelligence. IEEE Design & Test, 40(6), 149-162. https://dx.doi.org/10.1109/MDAT.2023.3307558
Project: IAF-ICP
I1801E0028
NAP (M4082282/04INS000515C130)
Journal: IEEE Design & Test
Abstract: Edge intelligence systems, the intersection of edge computing and artificial intelligence (AI), are pushing the frontier of AI applications. However, the complexity of deep learning models and heterogeneity of edge devices make the design of edge intelligence systems a challenging task. Hardware-agnostic methods face some limitations when implementing edge systems. Thus, hardware-aware methods are attracting more attention recently. In this paper, we present our recent endeavors in hardware-aware design and optimization for edge intelligence. We delve into techniques such as model compression and neural architecture search to achieve efficient and effective system designs. We also discuss some challenges in hardware-aware paradigm.
URI: https://hdl.handle.net/10356/171735
ISSN: 2168-2356
DOI: 10.1109/MDAT.2023.3307558
Schools: School of Computer Science and Engineering 
Research Centres: HP-NTU Digital Manufacturing Corporate Lab
Rights: © 2023 IEEE. All rights reserved.
Fulltext Permission: none
Fulltext Availability: No Fulltext
Appears in Collections:SCSE Journal Articles

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