Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/17188
Title: Simulation of post-breakdown transistor performance in ultrathin gate dielectrics-based nanoscale MOSFETs
Authors: Yaw, Meng Kwan.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
Issue Date: 2009
Abstract: The purpose of this project is to simulate the post-breakdown transistor performance in ultrathin gate dielectric. The simulator used was TSUPREM-4 and MEDICI, which is widely used in the semiconductor industry for simulation and analyze semiconductor processing. The simulation was done on a 0.13μm metal-oxide-semiconductor field-effect transistor (MOSFET) which has silicon and silicon oxide defects introduced into the gate dielectric. Various different doping defects and silicon oxide defects are added into the simulation to test for the post-breakdown I-V characteristics of the transistor.
URI: http://hdl.handle.net/10356/17188
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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