Full-stack web development for auto-assessment platform

Abstract

The field of Computer Science education has witnessed a surge in the number of students seeking to understand its intricate concepts. As the demand for quality education grows, the need for efficient evaluation tools becomes increasingly evident. While automated assessment platforms have proved invaluable in evaluating programming skills, they fall short when it comes to assessing Hardware Description Languages (HDLs). HDLs are specialized languages used to simulate digital circuits and systems, posing unique challenges that current assessment tools designed for General-Purpose Programming Languages (GPLs) cannot address.

This study builds upon the Automated Assessment Platform (AASP) developed by previous FYP works, enhancing its capabilities to accommodate HDL assessments. Leveraging the strengths of the existing AASP architecture and the scalable technology stacks, a comprehensive solution is devised to assess HDL assessments effectively. The approach is based on modifying the Judge0 framework, a recognized Online Judge System (OJS), to compile HDL code and visualize interactive waveforms generated by students' compiled HDL code.