APB bus IWDG verification based on universal verification methodology

Abstract

This thesis investigates the verification of the Independent Watchdog (IWDG) module in Microcontroller Units (MCUs) using Universal Verification Methodology (UVM), an advanced approach enhancing system reliability and integrity. It emphasizes the critical role of the IWDG in preventing system failures and explores the integration and verification of this module with the APB bus. Through a detailed literature review and technical background, the thesis sets a comprehensive context for the methodologies and technologies involved. The study primarily focuses on the design, implementation, and verification of the IWDG module using UVM. It outlines the architectural decisions, intricacies of the IWDG design, and the application of UVM, showcasing its effectiveness in flaw detection and design validation. A structured verification plan, alongside specific test cases, is meticulously crafted to validate the IWDG module's functionality comprehensively. This section not only highlights the strategic approach taken but also the expected outcomes and coverage metrics aimed for in the verification process. The study thoroughly details the key functions and working mechanisms of IWDG, highlighting UVM's significant advantages in enhancing verification efficiency and effectiveness. The verification results showed that the IWDG module excelled in functional correctness, performance standards, and stability requirements across a variety of test scenarios, ensuring a high degree of system stability and reliability. The testing approach covered extensive multifunction points, demonstrating the depth and comprehensiveness of the verification work. Overall, the test suite achieved complete coverage across all critical metrics for the IWDG functionality, validating its performance in expected operating scenarios and supporting the reliability of IWDG in real-world applications.