Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/175533
Title: | CMOS-fabricated ring surface ion trap with TSV integration | Authors: | Zhao, Peng Lim, Yu Dian Li, Hong Yu Likforman, Jean-Pierre Guidoni, Luca Desormeaux, Lilay Gros Tan, Chuan Seng |
Keywords: | Engineering | Issue Date: | 2023 | Source: | Zhao, P., Lim, Y. D., Li, H. Y., Likforman, J., Guidoni, L., Desormeaux, L. G. & Tan, C. S. (2023). CMOS-fabricated ring surface ion trap with TSV integration. 2023 International Electron Devices Meeting (IEDM). https://dx.doi.org/10.1109/IEDM45741.2023.10413875 | Project: | NRF2020-NRF-ANR073 HIT | Conference: | 2023 International Electron Devices Meeting (IEDM) | Abstract: | We present the design, fabrication, and test of ring surface trap on 12-inch wafers with a CMOS process. The design is based on Through Silicon Vias (TSV) interconnects. Up to 200 ions were loaded and cooled; preliminary compensations of electrostatic potential imperfections show that rotational symmetry can be partially restored. | URI: | https://hdl.handle.net/10356/175533 | ISBN: | 9798350327670 | ISSN: | 2156-017X | DOI: | 10.1109/IEDM45741.2023.10413875 | Schools: | School of Electrical and Electronic Engineering | Organisations: | Institute of Microelectronics, A*STAR | Rights: | © 2023 IEEE. All rights reserved. This article may be downloaded for personal use only. Any other use requires prior permission of the copyright holder. The Version of Record is available online at http://doi.org/10.1109/IEDM45741.2023.10413875. | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Conference Papers |
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radb22uzh4y.pdf | 1.11 MB | Adobe PDF | ![]() View/Open |
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