Please use this identifier to cite or link to this item:
Title: Charge pump/phase frequency detector in PLL for HDTV applications
Authors: Sim, Jian Xiang.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
Issue Date: 2009
Abstract: Phase locked loop is a system that tracks the oscillator output signal with the input reference signal in terms of phase and frequency. Variation of phase or frequency is reflected by an error voltage supplied to voltage controlled oscillator. This error signal is generated by combination of phase frequency detector, charge pump and loop filter. Besides these building blocks, a frequency divider is required at the loop feedback path to translate the high frequency output signal to a lower frequency for comparison with reference signal. In this project, phase frequency detector, charge pump and loop filter were designed and the loop simulation was done by adding two ideal blocks – voltage controlled oscillator and frequency divider. An additional layout of PFD was drawn and tested. This project is suitable for HDTV application. The range of input frequency is 8kHz to 120kHz while the output frequency is 20MHz to 300MHz. The output signal is used as sampling clock signal to detect the synchronization pulse in video signal.
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

Files in This Item:
File Description SizeFormat 
  Restricted Access
1.44 MBAdobe PDFView/Open

Google ScholarTM


Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.