Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/17879
Title: Design and evaluation of high-level estimation and optimization techniques for power consumption
Authors: Lee, Sheanwei.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
Issue Date: 2009
Abstract: This report presents design and evaluation of High-Level Estimation and Optimization Techniques for Power Consumption. Power dissipation has become increasingly more important as a design constraint as factors such as growing portable devices market, reliability, cooling and packaging are given a heavier consideration when designing ICs. By obtaining estimation of power consumption at higher levels of abstraction, designers are able to optimize and reduce power consumption more significantly and thus reducing design iteration time. In this project, we investigated the characterization based macro modeling technique by building a power model using information of lower level implementations. Replicating the steps taken, we have determined the inputs used are in normal binary format rather than 2’s complement binary. At the same time, the steps taken were automated whenever possible. Finally, the model was verified against the results from Synopsys Nanosim and an accuracy of 8.07% was obtained.
URI: http://hdl.handle.net/10356/17879
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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