Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/179110
Title: Energy efficient software-hardware co-design of quantized recurrent convolutional neural network for continuous cardiac monitoring
Authors: Hu, Jinhai
Leow, Cong Sheng
Goh, Wang Ling
Gao, Yuan
Keywords: Engineering
Issue Date: 2023
Source: Hu, J., Leow, C. S., Goh, W. L. & Gao, Y. (2023). Energy efficient software-hardware co-design of quantized recurrent convolutional neural network for continuous cardiac monitoring. 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS). https://dx.doi.org/10.1109/AICAS57966.2023.10168601
Project: A18A1b0045 
Conference: 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)
Abstract: This paper presents an electrocardiogram (ECG) signal classification model based on Recurrent Convolutional Neural Network (RCNN). With recurrent connections and data buffers, a single convolutional layer is reused to implement multiple layers function. Using a 5-layers CNN network as an example, this approach reduces the number of parameters by more than 50% while achieving the same feature extraction size. Furthermore, quantized RCNN (QRCNN) is proposed where the input signal, interlayer output, and kernel weights are quantized to unsigned INT8, INT4, and signed INT4 respectively. For hardware implementation, pipelining and data reuse within the 1-D convolution kernel can potentially reduce latency. QRCNN model achieved 98.08% validation accuracy on MIT-BIH datasets with only 1% degradation due to quantization. The estimated dynamic power consumption of the QRCNN is less than 60% of a conventional quantized CNN when implemented on a Xilinx Artix-7 FPGA, showing the potential for resource-constraint edge devices.
URI: https://hdl.handle.net/10356/179110
URL: https://ieeexplore.ieee.org/abstract/document/10168601
ISBN: 979-8-3503-3267-4
DOI: 10.1109/AICAS57966.2023.10168601
Schools: School of Electrical and Electronic Engineering 
Organisations: Institute of Microelectronics, A*STAR 
Research Centres: Centre for Integrated Circuits and Systems 
Rights: © 2023 IEEE. All rights reserved. This article may be downloaded for personal use only. Any other use requires prior permission of the copyright holder. The Version of Record is available online at http://doi.org/10.1109/AICAS57966.2023.10168601.
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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