High-efficiency power supply design for AI chips in data centers

Abstract

With the rapid development of science and technology, the number and variety of power electronic devices have increased significantly, greatly improving people's lives and work efficiency. This progress also demands more adaptable power management chips to efficiently supply power to these electronic devices. As an essential component of power management, switching power supplies are widely used in industrial and consumer applications due to their advantages of low ripple, strong load capacity, and high efficiency. In particular, in automotive electronics and industrial equipment, power management chips must convert a wide input voltage range into a suitable level, making step-down (Buck) converters a focal point of research among scholars and engineers.

At the same time, the proliferation of artificial intelligence (AI) across multiple sectors has led to an increasing demand for efficient energy supply solutions for AI chips, such as Graphics Processing Units (GPUs) in data centers. Modern data centers require processors that operate at low voltages while drawing high currents, making efficient power conversion a crucial challenge. Traditional 12V distribution systems suffer from high conduction losses, but migrating to a 48V power architecture significantly reduces these losses and enhances overall energy efficiency.

In this study, a cascaded Buck converter system is designed and analyzed to achieve efficient power conversion from 48V to 1V, a common requirement for AI-driven hardware applications. The research begins with the parameter calculation and design of two individual Buck converters: a 48V-to-8V stage and an 8V-to-1V stage. By adopting a cascaded structure, the system effectively reduces conversion stress while maintaining high efficiency. However, as stability becomes a critical concern in large voltage reduction scenarios, an interleaved topology is introduced into the second-stage Buck converter (8V-to-1V) to further optimize system performance. The interleaved approach reduces current stress on switching devices, minimizes switching losses, and significantly decreases output current ripple, thereby enhancing the overall efficiency and stability of the system.