Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/18801
Title: Design of a low-voltage input-output rail-to-rail CMOS buffer
Authors: Pua, Poo Toong.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2008
Abstract: Scaling of modern integrated circuit (IC) technologies as well as the increasing important of battery and solar powered system, demand more and more circuit to be able to operate at very low supply voltage environments. The most important basic building block in analog and mixed-mode circuits is the operational amplifier and buffer. In this report, a low voltage quasi rail-to-rail opamp input is introduced. A common-mode adapter that uses the common-mode voltage present at the common-source node of the available differential pair to accommodate the large common-mode input signal is proposed. The output stage of buffer uses a rail-to-rail class-AB with simple folded mesh feedback control without any resistors. The design of the buffer in this project is based on AMIS 0.5μm CMOS technology. The finalized buffer operates at 1.5V supply voltage and allows rail-to-rail input and output swings.
URI: http://hdl.handle.net/10356/18801
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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