Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/19569
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dc.contributor.authorSng, Yeow Hong.en_US
dc.date.accessioned2009-12-14T06:15:46Z-
dc.date.available2009-12-14T06:15:46Z-
dc.date.copyright1997en_US
dc.date.issued1997-
dc.identifier.urihttp://hdl.handle.net/10356/19569-
dc.description.abstractThis thesis reports original work on several new techniques for designing partially adaptive array processors for the narrowband and the broadband environment. To cover the background of the proposed designs, a comprehensive review of the various beamforming techniques is included in the thesis. This includes generalized sidelobe canceller (GSC), multiple sidelobe canceller (MSC), beamspace approach, power minimization approach and direct nulling technique.en_US
dc.format.extent265 p.-
dc.language.isoen-
dc.rightsNANYANG TECHNOLOGICAL UNIVERSITYen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic systems-
dc.titleNew techniques for partially adaptive array designen_US
dc.typeThesisen_US
dc.contributor.supervisorEr, Meng Hwaen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.degreeDoctor of Philosophy (EEE)en_US
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