Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/19581
Title: Low-power techniques for CMOS SRAM design
Authors: Wang, Hai Bo
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 1997
Abstract: This project attempts on exploring some low-power circuit techniques for CMOS SRAM design. The interests of this work are focused on the power reduction of the memory cell array, current-mode sensing circuit and FIFO memory.
URI: http://hdl.handle.net/10356/19581
Rights: NANYANG TECHNOLOGICAL UNIVERSITY
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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