Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/19666
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dc.contributor.authorShen Zhaoxuan.en_US
dc.date.accessioned2009-12-14T06:20:40Z-
dc.date.available2009-12-14T06:20:40Z-
dc.date.copyright1996en_US
dc.date.issued1996-
dc.identifier.urihttp://hdl.handle.net/10356/19666-
dc.description.abstractDuring recent years, high level synthesis has emerged as one of the most exciting and challenging areas in design automation. Ever increasing microelectronics technology and market competition drive the digital systems more and more complex. Increasingly large scale of digital circuits, more and more complex design requirements and objectives are all invoked into high level design. Tradeoffs of large design space exploration and complex objective optimization become crucial problems in high-level synthesis.en_US
dc.format.extent137 p.-
dc.language.isoen-
dc.rightsNANYANG TECHNOLOGICAL UNIVERSITYen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineeringen_US
dc.titleHigh-level synthesis of large digital systems based on precedence bipartite modelen_US
dc.typeThesisen_US
dc.contributor.supervisorJong, Ching Chuenen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.degreeMaster of Engineeringen_US
item.grantfulltextrestricted-
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Appears in Collections:EEE Theses
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