Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/19666
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shen Zhaoxuan. | en_US |
dc.date.accessioned | 2009-12-14T06:20:40Z | - |
dc.date.available | 2009-12-14T06:20:40Z | - |
dc.date.copyright | 1996 | en_US |
dc.date.issued | 1996 | - |
dc.identifier.uri | http://hdl.handle.net/10356/19666 | - |
dc.description.abstract | During recent years, high level synthesis has emerged as one of the most exciting and challenging areas in design automation. Ever increasing microelectronics technology and market competition drive the digital systems more and more complex. Increasingly large scale of digital circuits, more and more complex design requirements and objectives are all invoked into high level design. Tradeoffs of large design space exploration and complex objective optimization become crucial problems in high-level synthesis. | en_US |
dc.format.extent | 137 p. | - |
dc.language.iso | en | - |
dc.rights | NANYANG TECHNOLOGICAL UNIVERSITY | en_US |
dc.subject | DRNTU::Engineering::Electrical and electronic engineering | en_US |
dc.title | High-level synthesis of large digital systems based on precedence bipartite model | en_US |
dc.type | Thesis | en_US |
dc.contributor.supervisor | Jong, Ching Chuen | en_US |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.description.degree | Master of Engineering | en_US |
item.grantfulltext | restricted | - |
item.fulltext | With Fulltext | - |
Appears in Collections: | EEE Theses |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
ShenZhaoxuan1996.pdf Restricted Access | Main report | 17.11 MB | Adobe PDF | View/Open |
Page view(s) 50
489
Updated on Apr 19, 2025
Download(s)
3
Updated on Apr 19, 2025
Google ScholarTM
Check
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.