Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/19691
Title: Design concerns for EEPROM
Authors: Tan, Hong Mui.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 1995
Abstract: The floating gate EEPROM has been a popular choice for semiconductor memories for many years. In this thesis, several areas relating to design concerns of the device have been explored. Phenomena such as charge trapping in tunnel oxide was investigated using the thin oxide MOS capacitor while device degradation was invesigaed on the EEPROM cell.
URI: http://hdl.handle.net/10356/19691
Schools: School of Electrical and Electronic Engineering 
Rights: NANYANG TECHNOLOGICAL UNIVERSITY
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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