Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/19741
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Ho, Jiun Sien. | en_US |
dc.date.accessioned | 2009-12-14T06:33:25Z | - |
dc.date.available | 2009-12-14T06:33:25Z | - |
dc.date.copyright | 1995 | en_US |
dc.date.issued | 1995 | - |
dc.identifier.uri | http://hdl.handle.net/10356/19741 | - |
dc.description.abstract | This report outlines the design and implementation of a prototype fuzzy inference processor (FIP) using Xilinx field programmable gate arrays (FPGAs). The fuzzy rules are represented as pre-computed relation matrices and the fuzzy input variables are considered to be in the form of fuzzy singletons. This simplifies the inferencing process significantly and results in hardware architecture that is less complex. | en_US |
dc.format.extent | 98 p. | - |
dc.language.iso | en | - |
dc.rights | NANYANG TECHNOLOGICAL UNIVERSITY | en_US |
dc.subject | DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems | en_US |
dc.title | VLSI implementation of an inference processor for approximate reasoning | en_US |
dc.type | Thesis | en_US |
dc.contributor.supervisor | Lim, Meng Hiot | en_US |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.description.degree | Master of Engineering | en_US |
item.grantfulltext | restricted | - |
item.fulltext | With Fulltext | - |
Appears in Collections: | EEE Theses |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
EEE_THESES_273.pdf Restricted Access | 9.86 MB | Adobe PDF | View/Open |
Page view(s) 50
579
Updated on Apr 26, 2025
Download(s)
5
Updated on Apr 26, 2025
Google ScholarTM
Check
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.