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|Title:||Multichannel processing element simulation for neural networks applications||Authors:||Cao, En||Keywords:||DRNTU::Engineering::Electrical and electronic engineering||Issue Date:||1994||Abstract:||In recent years, hardware implementation of neural networks has received increasing attention from researchers. Various techniques for implementation have been used, such as analog, digital and a hybrid of both. This thesis describes the design and simulation of a digital hardware processing element. It focuses on the implementation of digital neural hardware based on bit-serial transmission and information processing which is known as the Pulse-Stream Implementation (PSI). Stochastic computing is an important PSI technique, and currently two techniques of stochastic computing are in use; they are binary stochastic computing (BSC) and pulse density modulation (PDM). As a model of neural hardware, the mapping network for modelling of freeform surfaces is discussed in geometrical terms.||URI:||http://hdl.handle.net/10356/19753||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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