Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/19814
Title: Computer-aided fault analysis of digital circuit
Authors: Yip, Chee Soon.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 1992
Abstract: Two test pattern generation programs are developed - bd and MoDalg. The bd implements the boolean difference method, an algebraic method that manipulates boolean equations to derive a complete test set for all possible stuck-at faults in the circuit under test.
URI: http://hdl.handle.net/10356/19814
Rights: NANYANG TECHNOLOGICAL UNIVERSITY
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
YipCheeSoon1992.pdf
  Restricted Access
Main report18.26 MBAdobe PDFView/Open

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.