Please use this identifier to cite or link to this item:
|Title:||Development of a chip-on-tape encapsulation process||Authors:||Mui, Yew Cheong.||Keywords:||DRNTU::Engineering::Manufacturing::Product engineering||Issue Date:||1996||Abstract:||This thesis summarizes the work conducted in an effort to develop an encapsulation process for a chip-on-tape package. The various studies conducted included encapsulation material selection, encapsulation process studies and optimization and FEA simulations for the prediction of package performance. Reliability tests which included temperature cycle test and high temperature- high humidity test were also conducted in the material selection phase.||URI:||http://hdl.handle.net/10356/20541||Rights:||NANYANG TECHNOLOGICAL UNIVERSITY||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||SIMTECH Theses|
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.