Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/2634
Title: VLSI architecture for hierarchical routing in dynamic route guidance systems
Authors: Jagadeesh, George Rosario
Keywords: DRNTU::Engineering::Computer science and engineering::Computer applications::Physical sciences and engineering
Issue Date: 2002
Abstract: The board aim of this project is to device alternate strategies to improve the efficiency of the route computation process by making extensive use of the knowledge about the road network and exploiting the power of dedicated hardware architectures.
URI: http://hdl.handle.net/10356/2634
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Theses

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