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https://hdl.handle.net/10356/2634| Title: | VLSI architecture for hierarchical routing in dynamic route guidance systems | Authors: | Jagadeesh, George Rosario | Keywords: | DRNTU::Engineering::Computer science and engineering::Computer applications::Physical sciences and engineering | Issue Date: | 2002 | Abstract: | The board aim of this project is to device alternate strategies to improve the efficiency of the route computation process by making extensive use of the knowledge about the road network and exploiting the power of dedicated hardware architectures. | URI: | http://hdl.handle.net/10356/2634 | Schools: | School of Computer Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
| Appears in Collections: | SCSE Theses |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| JagadeeshGeorgeRosario02.pdf Restricted Access | Main report | 3.87 MB | Adobe PDF | View/Open |
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