Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/2665
Full metadata record
DC FieldValueLanguage
dc.contributor.authorJimson Mathewen_US
dc.date.accessioned2008-09-17T09:07:23Z
dc.date.available2008-09-17T09:07:23Z
dc.date.copyright2000en_US
dc.date.issued2000
dc.identifier.urihttp://hdl.handle.net/10356/2665
dc.description.abstractThe use of Residue Number Systems (RNS) in highly computation intensive applications have been found to provide fast solutions. But its advantages are often eclipsed by the large area and hardware complexity of the conversion circuitry. With the recent development in conversion circuitry and also due to the advantages offered by VLSI technology, RNS is being used increasingly in many signal processing applications. In this context, we propose a few reverse converter architectures that save on hardware and are faster compared to the conventional ones.en_US
dc.rightsNanyang Technological Universityen_US
dc.subjectDRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition
dc.titleFramework for optimal residue-to-binary converters in VLSIen_US
dc.typeThesisen_US
dc.contributor.supervisorRadhakrisnan, Damuen_US
dc.contributor.schoolSchool of Computer Engineeringen_US
dc.description.degreeMaster of Applied Scienceen_US
item.fulltextWith Fulltext-
item.grantfulltextrestricted-
Appears in Collections:SCSE Theses
Files in This Item:
File Description SizeFormat 
JimsonMathew00.pdf
  Restricted Access
Main report14.1 MBAdobe PDFView/Open

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.