Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/2687
Title: Low power VLSI design
Authors: Yeo, Kiat Seng
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2000
Abstract: Focuses on the design of a new class of circuits which can overcome the CV2f barrier faced by the conventional CMOS logic.
URI: http://hdl.handle.net/10356/2687
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Research Reports (Staff & Graduate Students)

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