Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/2717
Title: Optional layout of input / output protection devices
Authors: Liu, Po Ching.
Siek, Liter.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials
Issue Date: 2000
Abstract: This project was initiated for the effective design and layout of input protection devices. Scope of this work includes setting up prototype ESD testing environment, studying the layout of commercial chips and the ESD threshold voltages, then test our own design on the chip fabricated.
URI: http://hdl.handle.net/10356/2717
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Research Reports (Staff & Graduate Students)

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