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|Title:||Low power CMOS circuit design using adiabatic logic||Authors:||Parthasarathy Srinivasa Raghavan.||Keywords:||DRNTU::Engineering::Electrical and electronic engineering||Issue Date:||2002||Abstract:||This dissertation elaborated on the most popular low power CMOS circuit and power reduction techniques. A special punch is given on the Adiabatic Quasi-Static CMOS logic of power reduction, followed by the proposal of “Reduced swing Aqs-CMOS/ASL logic.||URI:||http://hdl.handle.net/10356/3114||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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