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Title: Framework design for nanometer technology development and transistor optimization
Authors: Raymond Adhi Pangestu Selomulya
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2004
Abstract: This master project substantiates on-going Project DOUST (Design and Optimization of Ultra-Small Transistors) aiming to provide efficient and cost-effective aid solutions to new technology development and transistor design and optimization virtually. This dissertation marks the first step of achieved milestone for one of DOUST major goals, that is, to construct a general framework design for aiding nanometer technology development and transistor optimization for a given technology fulfilling the application-specific, multi-level TCAD (Technology Computer-aided Design) synthesis approach. Designed framework would access the technology data and transistor characteristics database generated from design of experiments (DOE) with the support of TCAD tools enabling transistor optimization through process variation; providing process windows; and building process and device databases. Equipped with embedded compact model (CM), the framework is to explore its application in aiding next-generation technology prediction, optimization, and development efficiently. Ultimately, the design framework shall link the technology development with device/circuit performance optimization.
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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