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https://hdl.handle.net/10356/3183
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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Rita Munarwi. | en_US |
dc.date.accessioned | 2008-09-17T09:24:08Z | - |
dc.date.available | 2008-09-17T09:24:08Z | - |
dc.date.copyright | 2005 | en_US |
dc.date.issued | 2005 | - |
dc.identifier.uri | http://hdl.handle.net/10356/3183 | - |
dc.description.abstract | This report presents a design of a low noise multistage voltage reference based on current-mode, which generates ± 200mV reference voltage. The reference circuit was designed under AMIS 0.5um process and typical supply voltage 1.2V. In the voltage reference circuit, all the MOSFET were designed to operate in the saturation region and the BJTs used are lateral type. | en_US |
dc.rights | Nanyang Technological University | en_US |
dc.subject | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits | - |
dc.title | Design of a low noise multistage voltage reference | en_US |
dc.type | Thesis | en_US |
dc.contributor.supervisor | Siek, Liter | en_US |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.description.degree | Master of Science (Integrated Circuit Design) | en_US |
item.fulltext | With Fulltext | - |
item.grantfulltext | restricted | - |
Appears in Collections: | EEE Theses |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
EEE-THESES_1070.pdf Restricted Access | 8.59 MB | Adobe PDF | View/Open |
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