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https://hdl.handle.net/10356/3298
Title: | Macromodelling of analogue circuits using VHDL-AMS | Authors: | Su, Latt Mon. | Keywords: | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits | Issue Date: | 2003 | Abstract: | The purpose of this project is to implement the top down design system by using VHDL-AMS. VHDL-AMS, an analogue hardware description language and an extension to Very High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL), is capable of modelling analogue models by using additional language features, and the heritage of digital modeling capability. | URI: | http://hdl.handle.net/10356/3298 | Schools: | School of Electrical and Electronic Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Theses |
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File | Description | Size | Format | |
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EEE-THESES_1174.pdf Restricted Access | 18.61 MB | Adobe PDF | View/Open |
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