Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/3302
Title: Design of the low-voltage CMOS analog multiplier
Authors: Sun, Guoliang.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2002
Abstract: Analog multiplier plays an important role in analog signal processing. This report analyses the four quadrant analog multiplier in detail. Different types of implemented architectures are described. Different techniques to achieve low voltage operation are also discussed.
URI: http://hdl.handle.net/10356/3302
Schools: School of Electrical and Electronic Engineering 
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
EEE-THESES_1178.pdf
  Restricted Access
2.66 MBAdobe PDFView/Open

Page view(s) 50

474
Updated on Mar 16, 2025

Download(s)

13
Updated on Mar 16, 2025

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.