Design of CMOS low noise amplifiers

Abstract

The design of fully-integrated LNAs (Low Noise Amplifiers) using CMOS technology is explored in this thesis. The LNA, being the first stage in the receiving path, is an important building block of a single-chip transceiver. The primary goal for the LNA is to minimize the noise figure of the receiver. In addition, it also helps to perform some image-attenuation and to increase the immunity of the front-end to the low frequency digital baseband signal. Unlike the traditional microwave/RF LNA design where the design procedures are well established, the design of CMOS LNA is still very much in its infancy. The design of a CMOS LNA presents a considerable challenge because of its simultaneous requirement for high gain, low noise figure, good linearity, good input and output matching and unconditional stability at the lowest power consumption. The lack of high quality passive components and the inadequate modeling of the noise sources of the transistor further complicate the design.