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|Title:||RF CMOS 0.18 micrometer parameterized layout generation kit||Authors:||Chan, Kwok Wai.||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits||Issue Date:||2004||Abstract:||This thesis provides a review on an existing foundry’s Complementary Metal Oxide Semiconductor (CMOS) Digital/Analog/Radio Frequency (RF) Technology Process Design Kit. An intensive study was carried out on the RF transistors, resistors, capacitors and inductors in the design kit to identify its shortcomings.||URI:||http://hdl.handle.net/10356/3327||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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