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|Title:||Process and device characterisation of advanced SOI devices||Authors:||Chan, Yeen Tat||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits||Issue Date:||2005||Source:||Chan, Y. T. (2005). Process and device characterisation of advanced SOI devices. Master’s thesis, Nanyang Technological University, Singapore.||Abstract:||The goal of this work is to investigate and develop fabrication technology for quadruple-gate (hereby called Double-gate-all-around) MOSFET and the novel n-gate device. It focuses on the process and device characterization of such advanced SOI devices. Most importantly, the process proposed in this work to fabricate such devices is compatible with standard bulk CMOS manufacturing.||URI:||https://hdl.handle.net/10356/3393||DOI:||10.32657/10356/3393||Rights:||Nanyang Technological University||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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