Adiabatic CMOS circuits

Abstract

In this dissertation, we present two novel energy recovery families: Dual Improved Adiabatic Pseudo-Domino Logic Family (DIAPDL) and Modified Dual Improved Adiabatic Pseudo-Domino Logic Family (MDIAPDL). They are based on partially-adiabatic designs that are simple and readily cascadable. They can be designed with two-phase clocking schemes for the design of 4-bit shift registers and 1-bit adder.