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|Title:||Dielectric/metal diffusion barrier in Cu/porous ultra low-k interconnect technology||Authors:||Chen, Zhe.||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials||Issue Date:||2006||Source:||Chen, Z. (2006). Dielectric/metal diffusion barrier in Cu/porous ultra low-k interconnect technology. Doctoral thesis, Nanyang Technological University, Singapore.||Abstract:||As Cu damascene process and low dielectric constant material (low-k) are introduced into back-end of line (BEOL) semiconductor manufacturing, a robust barrier system is highly essential for integrated circuit (IC) performance and reliability improvements. In this work, the application of dielectric diffusion barriers was explored using a novel dielectric/metal bilayer sidewall barrier structure. Our work demonstrates this bilayer barrier structure could efficiently enhance the sidewall barrier integrity. As a result, the electrical and reliability performance of Cu/porous ultra low-k interconnects, in terms of resistance-capacitance (RC) delay characteristics, leakage current, electrical breakdown strength (EBD), thermal stability and electromigration resistance, were significantly improved by using the bilayer barrier approach. Detail studies indicate that an optimized bilayer barrier structure could be achieved by increasing the proportion of the dielectric barrier and correspondingly reducing the thickness of the metal barrier.||URI:||http://hdl.handle.net/10356/3490||Rights:||Nanyang Technological University||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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