dc.contributor.authorShibu, Menonen_US
dc.date.accessioned2008-09-17T09:31:06Z
dc.date.accessioned2017-07-23T08:31:10Z
dc.date.available2008-09-17T09:31:06Z
dc.date.available2017-07-23T08:31:10Z
dc.date.copyright2007en_US
dc.date.issued2007
dc.identifier.citationShibu, M. (2007). Modulo adders, multipliers and shared-moduli architectures for moduli of type. Master’s thesis, Nanyang Technological University, Singapore.
dc.identifier.urihttp://hdl.handle.net/10356/3500
dc.description.abstractModulo arithmetic circuits are ubiquitous in Residue Number System (RNS) architectures. The basic arithmetic units used are modulo adders and multipliers. The efficient implementation of modulo adders and multipliers thus form the cornerstone of high performance RNS.en_US
dc.rightsNanyang Technological Universityen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
dc.titleModulo adders, multipliers and shared-moduli architectures for moduli of typeen_US
dc.typeThesisen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.contributor.supervisorChang Chip Hongen_US
dc.description.degreeMASTER OF ENGINEERING (EEE)en_US


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