Please use this identifier to cite or link to this item:
Title: Development of NTU CMOS process for SiGe BiCMOS technology
Authors: Wang, Jianpeng.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2002
Abstract: Wafer fabrication was completed in the Micro Fabrication laboratory (MFL) on two types of starting substrate. Electrical measurement of the fabricated devices showed that selected parameters in the DOE slightly missed the target values. Based on the electrical measurement results, a new set of parameters for DOE is proposed for another round of wafer fabrication.
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
  Restricted Access
8.29 MBAdobe PDFView/Open

Google ScholarTM


Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.