Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/3671
Title: Latchup analysis of deep submicrometer CMOS devices
Authors: Chen, Hong Lei.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2004
Abstract: The effects of the following factors and their combinations on latchup behaviour of a Shallow Trench Isolation (STI) CMOS latchup test structure are studied: Varying both the STI dimensions and geometry parameters of the test structure. Varying the biasing conditions of the test structure. Changing the temperature conditions of the test structure.
URI: http://hdl.handle.net/10356/3671
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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