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https://hdl.handle.net/10356/3757| Title: | Layout design for input/output transistors | Authors: | Wong, David Wing Fatt. | Keywords: | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits | Issue Date: | 2001 | Abstract: | In this project, the performance of area-efficient CMOS buffers using the octagon-type and circle-type layout for both NMOS and PMOS transistors are investigated. The performance criteria include the efficient use of layout area, output driving/ sinking capability and ESD robustness. | URI: | http://hdl.handle.net/10356/3757 | Schools: | School of Electrical and Electronic Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
| Appears in Collections: | EEE Theses |
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| File | Description | Size | Format | |
|---|---|---|---|---|
| EEE-THESES_1588.pdf Restricted Access | 4.3 MB | Adobe PDF | View/Open |
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