Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/3776
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dc.contributor.authorWu, Ruien
dc.date.accessioned2008-09-17T09:37:19Zen
dc.date.available2008-09-17T09:37:19Zen
dc.date.copyright2005en
dc.date.issued2005en
dc.identifier.citationWu, R. (2005). Design of a low-voltage low-power CMOS phase detector for SONET/SDH standards. Master’s thesis, Nanyang Technological University, Singapore.en
dc.identifier.urihttps://hdl.handle.net/10356/3776en
dc.description.abstractDue to the exponential growth in the Internet data traffic, the volume of data over the telecommunications network has increased rapidly. The required capacity of the transport (transmission) links must also increase, motivating work on faster communication channels. Among all the available transmission media, optical fiber achieves highest bandwidth with the lowest loss. Thus, the development of telecommunication transport networks has been accelerated, resulting in the Synchronous Optical Network (SONET)/Synchronous Digital Hierarchy (SDH) standards. The SONET OC-192, a standard for 10-Gb/s serial links, has been well established.en
dc.rightsNanyang Technological Universityen
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Optics, optoelectronics, photonicsen
dc.titleDesign of a low-voltage low-power CMOS phase detector for SONET/SDH standardsen
dc.typeThesisen
dc.contributor.supervisorYeo, Kiat Sengen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.description.degreeMASTER OF ENGINEERING (EEE)en
dc.identifier.doi10.32657/10356/3776en
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