Please use this identifier to cite or link to this item:
Title: Implementation of digital systems on FPGA devices
Authors: Chen, Lan.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
Issue Date: 2006
Abstract: The objective of the project is to design and synthesize both a master and slave PCI local bus, so that they can be reused if other design requires a PCI bus. The design in this work is based on PCI local bus specification rev 3.0. VERILOG HDL is chosen to implement the design in RTL level. The PCI master and PCI slave were separately simulated and verified for read and write operation using XILINXISE web pack. The two modules were then successfully integrated. The integration was also simulated and verified. Finally, the design was synthesized to XILINX Virtex-4 FPGA. And the synthesis result shows that the PCI speed required (66Mhz) in the specification is well satisfied.
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
  Restricted Access
7.38 MBAdobe PDFView/Open

Google ScholarTM


Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.