Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/3838
Title: Copper-ultra low k porous SiLK integration for deep submicron integrated circuits
Authors: Yang, Lieyong
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2006
Source: Yang, L. (2006). Copper-ultra low k porous SiLK integration for deep submicron integrated circuits. Doctoral thesis, Nanyang Technological University, Singapore.
Abstract: The integration of Cu and ULK porous SiLK using different barriers on blanket and patterned wafers has been investigated. This includes characterizations of ULK porous SiLK, Ta based barrier on ULK structures and Ta(N)/SiCN/ULK SiLK structures, and integration of Cu-ULK porous SiLK with different barriers on blanket and patterned wafers. The thermal stability, interaction and electrical properties of different structures were comparatively investigated by using various techniques. The single damascene lines were fabricated of Cu and ULK porous SiLK with different barrier layers in 0.13 µm technology. The line resistance, line to line leakage and breakdown voltage were evaluated at various conditions. Furthermore, effects of plasma treatment and additional SiCN layer on the electrical performance and thermal stability of the Cu/barrier/ULK structures were evaluated. Finally, the thickness of SiCN was also optimized by comparing the electrical performance of the samples with different SiCN thickness.
URI: https://hdl.handle.net/10356/3838
DOI: 10.32657/10356/3838
Rights: Nanyang Technological University
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
EEE-THESES_1660.pdf10.07 MBAdobe PDFThumbnail
View/Open

Page view(s) 50

295
Updated on Aug 2, 2021

Download(s) 20

251
Updated on Aug 2, 2021

Google ScholarTM

Check

Altmetric


Plumx

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.