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https://hdl.handle.net/10356/3845| Title: | Design of a low-voltage input-output rail-to-rail CMOS buffer | Authors: | Yang, Wenjie | Keywords: | DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits | Issue Date: | 2006 | Abstract: | The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs. | URI: | http://hdl.handle.net/10356/3845 | Schools: | School of Electrical and Electronic Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
| Appears in Collections: | EEE Theses |
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| File | Description | Size | Format | |
|---|---|---|---|---|
| EEE-THESES_1667.pdf Restricted Access | 8.06 MB | Adobe PDF | View/Open |
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